From 04904d20a8a31d2472c0e5d5ee89dd12a54247a1 Mon Sep 17 00:00:00 2001
From: Vishnu Santhosh <quic_vishsant@quicinc.com>
Date: Thu, 29 Aug 2024 21:24:31 +0530
Subject: [PATCH] ARM: dts: msm: Add smem nodes for sdxkova

Add smem nodes for sdxkova SoC.

Change-Id: I489aa0d9341cc48350a37c244135909d1686b0b5
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
---
 qcom/sdxkova-reserved-memory.dtsi |  2 ++
 qcom/sdxkova.dtsi                 | 12 ++++++++++++
 2 files changed, 14 insertions(+)

diff --git a/qcom/sdxkova-reserved-memory.dtsi b/qcom/sdxkova-reserved-memory.dtsi
index 0a6f7f3f..aa76ab43 100644
--- a/qcom/sdxkova-reserved-memory.dtsi
+++ b/qcom/sdxkova-reserved-memory.dtsi
@@ -64,6 +64,8 @@
 	};
 
 	smem_mem: smem_region@87e20000 {
+		compatible = "qcom,smem";
+		hwlocks = <&tcsr_mutex 3>;
 		no-map;
 		reg = <0x0 0x87e20000 0x0 0xc0000>;
 	};
diff --git a/qcom/sdxkova.dtsi b/qcom/sdxkova.dtsi
index a78a5def..8dbeb269 100644
--- a/qcom/sdxkova.dtsi
+++ b/qcom/sdxkova.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/soc/qcom,ipcc.h>
 #include "sdx75.dtsi"
 /delete-node/ &apps_smmu;
+/delete-node/ &tcsr_mutex;
 #include "msm-arm-smmu-sdxkova.dtsi"
 /{
 	qcom_tzlog: tz-log@14680720 {
@@ -406,6 +407,17 @@
 		interrupts = <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>;
 		cap-based-alloc-and-pwr-collapse;
 	};
+
+	tcsr_mutex_block: syscon@1f40000 {
+		compatible = "syscon";
+		reg = <0x0 0x1f40000 0x0 0x20000>;
+	};
+
+	tcsr_mutex: hwlock {
+		compatible = "qcom,tcsr-mutex";
+		syscon = <&tcsr_mutex_block 0 0x1000>;
+		#hwlock-cells = <1>;
+	};
 };
 
 &gcc {