From 02bf75d48c03e898dfd27f01953912ae5d78369a Mon Sep 17 00:00:00 2001 From: Mukund Deshmukh Date: Fri, 15 Nov 2024 15:40:22 +0530 Subject: [PATCH] ARM: dts: msm: Initial camera sensor dtsi files for Kera Initial sensor dtsi files for Kera MTP/CDP/RCM/QRD with: - Peripherals: CCI0/CCI1, - CSIPHY instances: 0 to 4, - Sensors: IMX766/IMX858/JN1/IMX688 nodes, - TPG instances: 1 to 2, - MCLK/RESET GPIO pin controls CRs-Fixed: 3970958. Change-Id: Ieb49cd277e1e3eb7b48344c6098e82b28dee2b20 --- config/sun.mk | 4 + kera-camera-sensor-cdp.dts | 23 + kera-camera-sensor-mtp.dts | 24 ++ kera-camera-sensor-mtp.dtsi | 418 ++++++++++++++++++ kera-camera-sensor-qrd.dts | 23 + kera-camera-sensor-rcm.dts | 24 ++ kera-camera.dtsi | 824 +++++++++++++++++++++++++++++++++++- 7 files changed, 1337 insertions(+), 3 deletions(-) create mode 100644 kera-camera-sensor-cdp.dts create mode 100644 kera-camera-sensor-mtp.dts create mode 100644 kera-camera-sensor-mtp.dtsi create mode 100644 kera-camera-sensor-qrd.dts create mode 100644 kera-camera-sensor-rcm.dts diff --git a/config/sun.mk b/config/sun.mk index 7c40229e..43a8a45f 100644 --- a/config/sun.mk +++ b/config/sun.mk @@ -11,3 +11,7 @@ dtbo-$(CONFIG_ARCH_TUNA) += tuna-camera-sensor-mtp.dtbo \ tuna-camera-sensor-qrd.dtbo dtbo-$(CONFIG_ARCH_KERA) += kera-camera.dtbo +dtbo-$(CONFIG_ARCH_KERA) += kera-camera-sensor-mtp.dtbo \ + kera-camera-sensor-cdp.dtbo \ + kera-camera-sensor-qrd.dtbo \ + kera-camera-sensor-rcm.dtbo diff --git a/kera-camera-sensor-cdp.dts b/kera-camera-sensor-cdp.dts new file mode 100644 index 00000000..2c23c69f --- /dev/null +++ b/kera-camera-sensor-cdp.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include +#include + +#include "kera-camera-sensor-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera CDP"; + compatible = "qcom,kera-cdp", "qcom,kera", "qcom,kerap-cdp", "qcom,kerap", + "qcom,cdp"; + qcom,msm-id = <686 0x10000>, <686 0x20000>, <659 0x10000>, <659 0x20000>; + qcom,board-id = <0x10001 0>, <0x20001 0>, <0x30001 0>, <0x40001 0>; +}; diff --git a/kera-camera-sensor-mtp.dts b/kera-camera-sensor-mtp.dts new file mode 100644 index 00000000..9a6d1726 --- /dev/null +++ b/kera-camera-sensor-mtp.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include +#include + +#include "kera-camera-sensor-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera MTP"; + compatible = "qcom,kera-mtp", "qcom,kera", "qcom,kerap-mtp", "qcom,kerap", + "qcom,mtp"; + qcom,msm-id = <686 0x10000>, <686 0x20000>, <659 0x10000>, <659 0x20000>; + qcom,board-id = <0x10008 0>, <0x10008 1>, <0x20008 0>, <0x20008 1>, + <0x30008 0>, <0x30008 1>; +}; diff --git a/kera-camera-sensor-mtp.dtsi b/kera-camera-sensor-mtp.dtsi new file mode 100644 index 00000000..bf0b5ed9 --- /dev/null +++ b/kera-camera-sensor-mtp.dtsi @@ -0,0 +1,418 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include +&soc { + led_flash_triple_rear_wide: qcom,camera-flash1 { + cell-index = <1>; + compatible = "qcom,camera-flash"; + flash-source = <&pmxr2230_flash0 &pmxr2230_flash1>; + torch-source = <&pmxr2230_torch0 &pmxr2230_torch1>; + switch-source = <&pmxr2230_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_tele: qcom,camera-flash2 { + cell-index = <2>; + compatible = "qcom,camera-flash"; + flash-source = <&pmxr2230_flash0 &pmxr2230_flash1>; + torch-source = <&pmxr2230_torch0 &pmxr2230_torch1>; + switch-source = <&pmxr2230_switch2>; + status = "ok"; + }; + + led_flash_triple_rear_ultrawide: qcom,camera-flash3 { + cell-index = <3>; + compatible = "qcom,camera-flash"; + flash-source = <&pmxr2230_flash0 &pmxr2230_flash1>; + torch-source = <&pmxr2230_torch0 &pmxr2230_torch1>; + switch-source = <&pmxr2230_switch2>; + status = "ok"; + }; + + qcom,cam-res-mgr { + compatible = "qcom,cam-res-mgr"; + status = "ok"; + }; +}; + +&cam_cci0 { + actuator_triple_wide: qcom,actuator2 { + cell-index = <2>; + compatible = "qcom,actuator"; + cci-master = ; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + status = "ok"; + }; + + /* Actuator (UW) */ + actuator_triple_uw: qcom,actuator1 { + cell-index = <1>; + compatible = "qcom,actuator"; + cci-master = ; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <103000>; + status = "ok"; + }; + + /* OIS (W) */ + ois_wide: qcom,ois0 { + cell-index = <2>; + compatible = "qcom,ois"; + cci-master = ; + cam_vio-supply = <&L5N>; + cam_vaf-supply = <&L7M>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + regulator-names = "cam_vio","cam_vaf", "cam_clk"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 2800000 0>; + rgltr-max-voltage = <1980000 3000000 0>; + rgltr-load-current = <3500 214290 0>; + status = "ok"; + }; + + /* EEPROM (W) */ + eeprom_wide: qcom,eeprom2 { + cell-index = <2>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L1N>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L6M>; + cam_vaf-supply = <&L7M>; + cam_v_custom1-supply = <&L3N>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_vaf", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1104000 0 2800000 2800000 1800000>; + rgltr-max-voltage = <1980000 1200000 0 2900000 3000000 1900000>; + rgltr-load-current = <3500 913200 0 91430 103000 63100>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 66 0>, + <&tlmm 124 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* EEPROM (UW) */ + eeprom_uw: qcom,eeprom1 { + cell-index = <1>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L1M>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L3M>; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1056000 0 2800000 2800000>; + rgltr-max-voltage = <1980000 1200000 0 2900000 3000000>; + rgltr-load-current = <3500 522730 0 107140 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 65 0>, + <&tlmm 123 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* IMX858 (UWide) */ + qcom,cam-sensor1 { + cell-index = <1>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <0>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_uw>; + actuator-src = <&actuator_triple_uw>; + led-flash-src = <&led_flash_triple_rear_ultrawide>; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L1M>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L3M>; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1056000 0 2800000 2800000>; + rgltr-max-voltage = <1980000 1200000 0 2900000 3000000>; + rgltr-load-current = <3500 522730 0 107140 103000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk0_active + &cam_sensor_active_rst0>; + pinctrl-1 = <&cam_sensor_mclk0_suspend + &cam_sensor_suspend_rst0>; + gpios = <&tlmm 65 0>, + <&tlmm 123 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK0", + "CAM_RESET0"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK0_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* IMX766 + OIS (Wide) */ + qcom,cam-sensor2 { + cell-index = <2>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <1>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_wide>; + ois-src = <&ois_wide>; + actuator-src = <&actuator_triple_wide>; + led-flash-src = <&led_flash_triple_rear_wide>; + cam_vio-supply = <&L5M>; + cam_vdig-supply = <&L1N>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L6M>; + cam_vaf-supply = <&L7M>; + cam_v_custom1-supply = <&L3N>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", "cam_vana", + "cam_vaf", "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1104000 0 2800000 2800000 1800000>; + rgltr-max-voltage = <1980000 1200000 0 2900000 3000000 1900000>; + rgltr-load-current = <3500 913200 0 91430 103000 63100>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk1_active + &cam_sensor_active_rst1>; + pinctrl-1 = <&cam_sensor_mclk1_suspend + &cam_sensor_suspend_rst1>; + gpios = <&tlmm 66 0>, + <&tlmm 124 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK1", + "CAM_RESET1"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK1_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; +}; + +&cam_cci1 { + /* Actuator (Tele) */ + actuator_triple_tele: qcom,actuator3 { + cell-index = <3>; + compatible = "qcom,actuator"; + cci-master = ; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <2800000>; + rgltr-max-voltage = <3000000>; + rgltr-load-current = <130000>; + status = "ok"; + }; + + /* EEPROM (Tele) */ + eeprom_tele: qcom,eeprom3 { + cell-index = <3>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L2M>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L4M>; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", + "cam_vana", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1056000 0 2800000 2800000>; + rgltr-max-voltage = <1980000 1150000 0 2900000 3000000>; + rgltr-load-current = <4000 261000 0 68000 130000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 67 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* EEPROM (Front) */ + eeprom_front: qcom,eeprom4 { + cell-index = <4>; + compatible = "qcom,eeprom"; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L2N>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L6N>; + cam_v_custom1-supply = <&L4N>; + regulator-names = "cam_vio", "cam_vdig","cam_clk", "cam_vana", + "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1104000 0 2800000 1800000>; + rgltr-max-voltage = <1980000 1150000 0 2900000 1900000>; + rgltr-load-current = <5000 453330 0 77500 28890>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 68 0>, + <&tlmm 126 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* IMX688 (Front) */ + qcom,cam-sensor4 { + cell-index = <4>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <3>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <0>; + eeprom-src = <&eeprom_front>; + cam_vio-supply = <&L5N>; + cam_vdig-supply = <&L2N>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L6N>; + cam_v_custom1-supply = <&L4N>; + regulator-names = "cam_vio", "cam_vdig","cam_clk", "cam_vana", + "cam_v_custom1"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1104000 0 2800000 1800000>; + rgltr-max-voltage = <1980000 1150000 0 2900000 1900000>; + rgltr-load-current = <5000 453330 0 77500 28890>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk3_active + &cam_sensor_active_rst3>; + pinctrl-1 = <&cam_sensor_mclk3_suspend + &cam_sensor_suspend_rst3>; + gpios = <&tlmm 68 0>, + <&tlmm 126 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK3", + "CAM_RESET3"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK3_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + + /* JN1 (Tele) */ + qcom,cam-sensor3 { + cell-index = <3>; + compatible = "qcom,cam-sensor"; + csiphy-sd-index = <2>; + sensor-position-roll = <90>; + sensor-position-pitch = <0>; + sensor-position-yaw = <180>; + eeprom-src = <&eeprom_tele>; + actuator-src = <&actuator_triple_tele>; + led-flash-src = <&led_flash_triple_rear_tele>; + cam_vio-supply = <&L5M>; + cam_vdig-supply = <&L2M>; + cam_clk-supply = <&cam_cc_titan_top_gdsc>; + cam_vana-supply = <&L4M>; + cam_vaf-supply = <&L7M>; + regulator-names = "cam_vio", "cam_vdig", "cam_clk", + "cam_vana", "cam_vaf"; + rgltr-cntrl-support; + rgltr-min-voltage = <1800000 1056000 0 2800000 2800000>; + rgltr-max-voltage = <1980000 1150000 0 2900000 3000000>; + rgltr-load-current = <4000 261000 0 68000 130000>; + gpio-no-mux = <0>; + pinctrl-names = "cam_default", "cam_suspend"; + pinctrl-0 = <&cam_sensor_mclk2_active + &cam_sensor_active_rst2>; + pinctrl-1 = <&cam_sensor_mclk2_suspend + &cam_sensor_suspend_rst2>; + gpios = <&tlmm 67 0>, + <&tlmm 125 0>; + gpio-reset = <1>; + gpio-req-tbl-num = <0 1>; + gpio-req-tbl-flags = <1 0>; + gpio-req-tbl-label = "CAMIF_MCLK2", + "CAM_RESET2"; + cci-master = ; + clocks = <&cambistmclkcc CAM_BIST_MCLK_CC_MCLK2_CLK>; + clock-names = "cam_clk"; + clock-cntl-level = "nominal"; + clock-rates = <24000000>; + status = "ok"; + }; + +}; diff --git a/kera-camera-sensor-qrd.dts b/kera-camera-sensor-qrd.dts new file mode 100644 index 00000000..5b3b5e6c --- /dev/null +++ b/kera-camera-sensor-qrd.dts @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include +#include + +#include "kera-camera-sensor-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera QRD"; + compatible = "qcom,kera-qrd", "qcom,kera", "qcom,kerap-qrd", "qcom,kerap", + "qcom,qrd"; + qcom,msm-id = <686 0x10000>, <686 0x20000>, <659 0x10000>, <659 0x20000>; + qcom,board-id = <0x1000B 0>, <0x2000B 0>, <0x3000B 0>; +}; diff --git a/kera-camera-sensor-rcm.dts b/kera-camera-sensor-rcm.dts new file mode 100644 index 00000000..7863cc84 --- /dev/null +++ b/kera-camera-sensor-rcm.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include +#include + +#include "kera-camera-sensor-mtp.dtsi" +/ { + model = "Qualcomm Technologies, Inc. Kera RCM"; + compatible = "qcom,kera-rcm", "qcom,kera", "qcom,kerap-rcm", "qcom,kerap", + "qcom,rcm"; + qcom,msm-id = <686 0x10000>, <686 0x20000>, <659 0x10000>, <659 0x20000>; + qcom,board-id = <0x10015 0>, <0x20015 0>, <0x30015 0>, <0x10015 1>, + <0x20015 1>, <0x30015 1>; +}; diff --git a/kera-camera.dtsi b/kera-camera.dtsi index 4d0e9a88..790ff951 100644 --- a/kera-camera.dtsi +++ b/kera-camera.dtsi @@ -6,6 +6,457 @@ #include #include +&tlmm { + cci_i2c_sda0_active: cci_i2c_sda0_active { + mux { + /* CLK, DATA */ + pins = "gpio70"; + function = "cci_i2c_sda0"; + }; + + config { + pins = "gpio70"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda0_suspend: cci_i2c_sda0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio70"; + function = "cci_i2c_sda0"; + }; + + config { + pins = "gpio70"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl0_active: cci_i2c_scl0_active { + mux { + /* CLK, DATA */ + pins = "gpio71"; + function = "cci_i2c_scl0"; + }; + + config { + pins = "gpio71"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl0_suspend: cci_i2c_scl0_suspend { + mux { + /* CLK, DATA */ + pins = "gpio71"; + function = "cci_i2c_scl0"; + }; + + config { + pins = "gpio71"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda1_active: cci_i2c_sda1_active { + mux { + /* CLK, DATA */ + pins = "gpio72"; + function = "cci_i2c_sda1"; + }; + + config { + pins = "gpio72"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda1_suspend: cci_i2c_sda1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio72"; + function = "cci_i2c_sda1"; + }; + + config { + pins = "gpio72"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl1_active: cci_i2c_scl1_active { + mux { + /* CLK, DATA */ + pins = "gpio73"; + function = "cci_i2c_scl1"; + }; + + config { + pins = "gpio73"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl1_suspend: cci_i2c_scl1_suspend { + mux { + /* CLK, DATA */ + pins = "gpio73"; + function = "cci_i2c_scl1"; + }; + + config { + pins = "gpio73"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda2_active: cci_i2c_sda2_active { + mux { + /* CLK, DATA */ + pins = "gpio74"; + function = "cci_i2c_sda2"; + }; + + config { + pins = "gpio74"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda2_suspend: cci_i2c_sda2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio74"; + function = "cci_i2c_sda2"; + }; + + config { + pins = "gpio74"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl2_active: cci_i2c_scl2_active { + mux { + /* CLK, DATA */ + pins = "gpio75"; + function = "cci_i2c_scl2"; + }; + + config { + pins = "gpio75"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl2_suspend: cci_i2c_scl2_suspend { + mux { + /* CLK, DATA */ + pins = "gpio75"; + function = "cci_i2c_scl2"; + }; + + config { + pins = "gpio75"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_sda3_active: cci_i2c_sda3_active { + mux { + pins = "gpio76"; + function = "cci_i2c_sda3"; + }; + + config { + pins = "gpio76"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_sda3_suspend: cci_i2c_sda3_suspend { + mux { + pins = "gpio76"; + function = "cci_i2c_sda3"; + }; + + config { + pins = "gpio76"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cci_i2c_scl3_active: cci_i2c_scl3_active { + mux { + pins = "gpio77"; + function = "cci_i2c_scl3"; + }; + + config { + pins = "gpio77"; + bias-pull-up; /* PULL UP*/ + drive-strength = <2>; /* 2 MA */ + qcom,i2c_pull; + }; + }; + + cci_i2c_scl3_suspend: cci_i2c_scl3_suspend { + mux { + pins = "gpio77"; + function = "cci_i2c_scl3"; + }; + + config { + pins = "gpio77"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_active: cam_sensor_mclk0_active { + /* MCLK0 */ + mux { + pins = "gpio65"; + function = "cam_mclk"; + }; + + config { + pins = "gpio65"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend { + /* MCLK0 */ + mux { + pins = "gpio65"; + function = "cam_mclk"; + }; + + config { + pins = "gpio65"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_active: cam_sensor_mclk1_active { + /* MCLK1 */ + mux { + pins = "gpio66"; + function = "cam_mclk"; + }; + + config { + pins = "gpio66"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend { + /* MCLK1 */ + mux { + pins = "gpio66"; + function = "cam_mclk"; + }; + + config { + pins = "gpio66"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_active: cam_sensor_mclk2_active { + /* MCLK2 */ + mux { + pins = "gpio67"; + function = "cam_mclk"; + }; + + config { + pins = "gpio67"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend { + /* MCLK2 */ + mux { + pins = "gpio67"; + function = "cam_mclk"; + }; + + config { + pins = "gpio67"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_active: cam_sensor_mclk3_active { + /* MCLK3 */ + mux { + pins = "gpio68"; + function = "cam_mclk"; + }; + + config { + pins = "gpio68"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend { + /* MCLK3 */ + mux { + pins = "gpio68"; + function = "cam_mclk"; + }; + + config { + pins = "gpio68"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_active_rst0: cam_sensor_active_rst0 { + mux { + pins = "gpio123"; + function = "gpio"; + }; + + config { + pins = "gpio123"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 { + mux { + pins = "gpio123"; + function = "gpio"; + }; + + config { + pins = "gpio123"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst1: cam_sensor_active_rst1 { + mux { + pins = "gpio124"; + function = "gpio"; + }; + + config { + pins = "gpio124"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 { + mux { + pins = "gpio124"; + function = "gpio"; + }; + + config { + pins = "gpio124"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; + + cam_sensor_active_rst2: cam_sensor_active_rst2 { + mux { + pins = "gpio125"; + function = "gpio"; + }; + + config { + pins = "gpio125"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + qcom,apps; + }; + }; + + cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 { + mux { + pins = "gpio125"; + function = "gpio"; + }; + + config { + pins = "gpio125"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + qcom,remote; + }; + }; + + cam_sensor_active_rst3: cam_sensor_active_rst3 { + mux { + pins = "gpio126"; + function = "gpio"; + }; + + config { + pins = "gpio126"; + bias-disable; /* No PULL */ + drive-strength = <2>; /* 2 MA */ + }; + }; + + cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 { + mux { + pins = "gpio126"; + function = "gpio"; + }; + + config { + pins = "gpio126"; + bias-pull-down; /* PULL DOWN */ + drive-strength = <2>; /* 2 MA */ + output-low; + }; + }; +}; &soc { #address-cells = <1>; @@ -21,6 +472,373 @@ compatible = "qcom,cam-sync"; status = "ok"; }; + cam_csiphy0: qcom,csiphy0@ada9000 { + cell-index = <0>; + compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy"; + reg = <0x0ada9000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x1a9000>; + interrupt-names = "CSIPHY0"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L4B>; + csi-vdd-0p9-supply = <&L2B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1320000 950000>; + rgltr-load-current = <0 14120 145800>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy0_clk", + "csi0phytimer_clk_src", + "csi0phytimer_clk"; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY0_CLK>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI0PHYTIMER_CLK>; + src-clock-name = "cphy_rx_clk_src"; + clock-cntl-level = "lowsvs", "svs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy1: qcom,csiphy1@adab000 { + cell-index = <1>; + compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy"; + reg = <0x0adab000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x1ab000>; + interrupt-names = "CSIPHY1"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L4B>; + csi-vdd-0p9-supply = <&L2B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1320000 950000>; + rgltr-load-current = <0 14120 145800>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy1_clk", + "csi1phytimer_clk_src", + "csi1phytimer_clk"; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY1_CLK>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI1PHYTIMER_CLK>; + src-clock-name = "cphy_rx_clk_src"; + clock-cntl-level = "lowsvs", "svs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy2: qcom,csiphy2@adad000 { + cell-index = <2>; + compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy"; + reg = <0x0adad000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x1ad000>; + interrupt-names = "CSIPHY2"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L4B>; + csi-vdd-0p9-supply = <&L2B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1320000 950000>; + rgltr-load-current = <0 14120 145800>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy2_clk", + "csi2phytimer_clk_src", + "csi2phytimer_clk"; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY2_CLK>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI2PHYTIMER_CLK>; + src-clock-name = "cphy_rx_clk_src"; + clock-cntl-level = "lowsvs", "svs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_csiphy3: qcom,csiphy3@adaf000 { + cell-index = <3>; + compatible = "qcom,csiphy-v2.3.0", "qcom,csiphy"; + reg = <0x0adaf000 0x2000>; + reg-names = "csiphy"; + reg-cam-base = <0x1af000>; + interrupt-names = "CSIPHY3"; + interrupts = ; + regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + csi-vdd-1p2-supply = <&L4B>; + csi-vdd-0p9-supply = <&L2B>; + rgltr-cntrl-support; + rgltr-min-voltage = <0 1200000 880000>; + rgltr-max-voltage = <0 1320000 950000>; + rgltr-load-current = <0 14120 145800>; + shared-clks = <1 0 0 0>; + clock-names = "cphy_rx_clk_src", + "csiphy3_clk", + "csi3phytimer_clk_src", + "csi3phytimer_clk"; + clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSIPHY3_CLK>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>, + <&camcc CAM_CC_CSI3PHYTIMER_CLK>; + src-clock-name = "cphy_rx_clk_src"; + clock-cntl-level = "lowsvs", "svs", "nominal"; + clock-rates = + <400000000 0 400000000 0>, + <480000000 0 400000000 0>, + <480000000 0 400000000 0>; + status = "ok"; + }; + + cam_cci0: qcom,cci0@ac7b000 { + cell-index = <0>; + compatible = "qcom,cci", "simple-bus"; + reg = <0x0ac7b000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x7b000>; + interrupt-names = "CCI0"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_0_clk_src", + "cci_0_clk"; + clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>, + <&camcc CAM_CC_CCI_0_CLK>; + clock-rates = <37500000 0>, <37500000 0>; + clock-cntl-level = "lowsvs", "svs"; + src-clock-name = "cci_0_clk_src"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci_i2c_scl0_active &cci_i2c_sda0_active>; + pinctrl-1 = <&cci_i2c_scl0_suspend &cci_i2c_sda0_suspend>; + pinctrl-2 = <&cci_i2c_scl1_active &cci_i2c_sda1_active>; + pinctrl-3 = <&cci_i2c_scl1_suspend &cci_i2c_sda1_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci0: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci0: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci0: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_cci1: qcom,cci1@ac7c000 { + cell-index = <1>; + compatible = "qcom,cci", "simple-bus"; + reg = <0x0ac7c000 0x1000>; + reg-names = "cci"; + reg-cam-base = <0x7c000>; + interrupt-names = "CCI1"; + interrupts = ; + regulator-names = "gdscr"; + gdscr-supply = <&cam_cc_titan_top_gdsc>; + clock-names = "cci_1_clk_src", + "cci_1_clk"; + clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>, + <&camcc CAM_CC_CCI_1_CLK>; + clock-rates = <37500000 0>, <37500000 0>; + clock-cntl-level = "lowsvs", "svs"; + src-clock-name = "cci_1_clk_src"; + pctrl-idx-mapping = ; + pctrl-map-names = "m0", "m1"; + pinctrl-names = "m0_active", "m0_suspend", + "m1_active", "m1_suspend"; + pinctrl-0 = <&cci_i2c_scl2_active &cci_i2c_sda2_active>; + pinctrl-1 = <&cci_i2c_scl2_suspend &cci_i2c_sda2_suspend>; + pinctrl-2 = <&cci_i2c_scl3_active &cci_i2c_sda3_active>; + pinctrl-3 = <&cci_i2c_scl3_suspend &cci_i2c_sda3_suspend>; + status = "ok"; + + i2c_freq_100Khz_cci1: qcom,i2c_standard_mode { + hw-thigh = <201>; + hw-tlow = <174>; + hw-tsu-sto = <204>; + hw-tsu-sta = <231>; + hw-thd-dat = <22>; + hw-thd-sta = <162>; + hw-tbuf = <227>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_400Khz_cci1: qcom,i2c_fast_mode { + hw-thigh = <38>; + hw-tlow = <56>; + hw-tsu-sto = <40>; + hw-tsu-sta = <40>; + hw-thd-dat = <22>; + hw-thd-sta = <35>; + hw-tbuf = <62>; + hw-scl-stretch-en = <0>; + hw-trdhld = <6>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_custom_cci1: qcom,i2c_custom_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <1>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + + i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode { + hw-thigh = <16>; + hw-tlow = <22>; + hw-tsu-sto = <17>; + hw-tsu-sta = <18>; + hw-thd-dat = <16>; + hw-thd-sta = <15>; + hw-tbuf = <24>; + hw-scl-stretch-en = <0>; + hw-trdhld = <3>; + hw-tsp = <3>; + cci-clk-src = <37500000>; + status = "ok"; + }; + }; + + cam_csiphy_tpg13: qcom,tpg13@ad8b000 { + cell-index = <13>; + phy-id = <0>; + compatible = "qcom,cam-tpg104"; + reg-names = "tpg0", "cam_cpas_top"; + reg = <0x0ad8b000 0x400>, + <0x0ac04000 0x1000>; + reg-cam-base = <0x18b000 0x04000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg0"; + interrupts = ; + shared-clks = <1 0>; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0>, + <400000000 0>, + <480000000 0>; + clock-cntl-level = "lowsvs", "svs", "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; + + cam_csiphy_tpg14: qcom,tpg14@ad8c000 { + cell-index = <14>; + phy-id = <1>; + compatible = "qcom,cam-tpg104"; + reg-names = "tpg1", "cam_cpas_top"; + reg = <0x0ad8c000 0x400>, + <0x0ac04000 0x1000>; + reg-cam-base = <0x18c000 0x04000>; + regulator-names = "gdsc"; + gdsc-supply = <&cam_cc_titan_top_gdsc>; + interrupt-names = "tpg1"; + interrupts = ; + shared-clks = <1 0>; + clock-names = + "cphy_rx_clk_src", + "csid_csiphy_rx_clk"; + clocks = + <&camcc CAM_CC_CPHY_RX_CLK_SRC>, + <&camcc CAM_CC_CSID_CSIPHY_RX_CLK>; + clock-rates = + <400000000 0>, + <400000000 0>, + <480000000 0>; + clock-cntl-level = "lowsvs", "svs", "nominal"; + src-clock-name = "cphy_rx_clk_src"; + status = "ok"; + }; qcom,cam_smmu { compatible = "qcom,msm-cam-smmu", "simple-bus"; @@ -391,12 +1209,12 @@ "turbo", "turbo"; client-id-based; client-names = - "csiphy0", "csiphy1", "csiphy2", "csiphy3", "csiphy4", "csiphy5", - "cci0", "cci1", "cci2", "csid0", "csid1", "csid2", "csid3", + "csiphy0", "csiphy1", "csiphy2", "csiphy3", + "cci0", "cci1", "csid0", "csid1", "csid2", "csid3", "ife0", "ife1", "ife2", "ife3", "ipe0", "rt-cdm0", "rt-cdm1", "rt-cdm2", "rt-cdm3", "cam-cdm-intf0", "icp0", "icp1", "ofe0", "cre0", - "jpeg-dma0", "jpeg-enc0"; + "jpeg-dma0", "jpeg-enc0", "tpg13", "tpg14"; sys-cache-names = "ofe_ip", "ipe_rt_ip", "ipe_srt_ip", "ipe_rt_rf", "ipe_srt_rf"; sys-cache-uids = <71 72 73 74 75>; sys-cache-concur = <1 1 1 0 0>;