From 00b06e64e631039b4623cd7a3fc4d6caf61d7758 Mon Sep 17 00:00:00 2001
From: Prasanna S <quic_prass@quicinc.com>
Date: Thu, 21 Nov 2024 15:11:18 +0530
Subject: [PATCH] ARM: dts: msm: Define dtsi property memory-region in SVM Kera
 and Tuna

Property memory-region is not defined for secure I2C/SPI QUP wrapper
instance and GPI instance. Updated the property correctly now.

Fixes: f1bff316cc84 ("ARM: dts: msm: Add spi, i2c, gpi nodes for SVM tuna")
Fixes: e6e2aa812d2d ("ARM: dts: msm: Add spi, i2c, gpi nodes for SVM kera")
Change-Id: I9f43e38ea78c90009708070beca75e3a93bf5424
Signed-off-by: Prasanna S <quic_prass@quicinc.com>
---
 qcom/kera-vm.dtsi | 4 ++++
 qcom/tuna-vm.dtsi | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/qcom/kera-vm.dtsi b/qcom/kera-vm.dtsi
index ded31433..1d8e9513 100644
--- a/qcom/kera-vm.dtsi
+++ b/qcom/kera-vm.dtsi
@@ -309,6 +309,7 @@
 		reg-names = "gpi-top";
 		iommus = <&apps_smmu 0xb8 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
@@ -342,6 +343,7 @@
 			<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
 		iommus = <&apps_smmu 0xb8 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		ranges;
 		status = "ok";
@@ -383,6 +385,7 @@
 		reg-names = "gpi-top";
 		iommus = <&apps_smmu 0x438 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
@@ -416,6 +419,7 @@
 			<&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
 		iommus = <&apps_smmu 0x438 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		ranges;
 		status = "ok";
diff --git a/qcom/tuna-vm.dtsi b/qcom/tuna-vm.dtsi
index c6a927d6..93fd4c0c 100644
--- a/qcom/tuna-vm.dtsi
+++ b/qcom/tuna-vm.dtsi
@@ -564,6 +564,7 @@
 		reg-names = "gpi-top";
 		iommus = <&apps_smmu 0xb8 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		interrupts = <GIC_SPI 279 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 280 IRQ_TYPE_LEVEL_HIGH>,
@@ -597,6 +598,7 @@
 			<&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>;
 		iommus = <&apps_smmu 0xb8 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		ranges;
 		status = "ok";
@@ -638,6 +640,7 @@
 		reg-names = "gpi-top";
 		iommus = <&apps_smmu 0x438 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		interrupts = <GIC_SPI 588 IRQ_TYPE_LEVEL_HIGH>,
 			<GIC_SPI 589 IRQ_TYPE_LEVEL_HIGH>,
@@ -671,6 +674,7 @@
 			<&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>;
 		iommus = <&apps_smmu 0x438 0x0>;
 		qcom,iommu-group = <&qup_iommu_group>;
+		memory-region = <&qup_iommu_group>;
 		dma-coherent;
 		ranges;
 		status = "ok";