# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/microchip,eic.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip External Interrupt Controller

maintainers:
  - Claudiu Beznea <claudiu.beznea@microchip.com>

description:
  This interrupt controller is found in Microchip SoCs (SAMA7G5) and provides
  support for handling up to 2 external interrupt lines.

properties:
  compatible:
    enum:
      - microchip,sama7g5-eic

  reg:
    maxItems: 1

  interrupt-controller: true

  '#interrupt-cells':
    const: 2
    description:
      The first cell is the input IRQ number (between 0 and 1), the second cell
      is the trigger type as defined in interrupt.txt present in this directory.

  interrupts:
    description: |
      Contains the GIC SPI IRQs mapped to the external interrupt lines. They
      should be specified sequentially from output 0 to output 1.
    minItems: 2
    maxItems: 2

  clocks:
    maxItems: 1

  clock-names:
    const: pclk

required:
  - compatible
  - reg
  - interrupt-controller
  - '#interrupt-cells'
  - interrupts
  - clocks
  - clock-names

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/at91.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    eic: interrupt-controller@e1628000 {
      compatible = "microchip,sama7g5-eic";
      reg = <0xe1628000 0x100>;
      interrupt-parent = <&gic>;
      interrupt-controller;
      #interrupt-cells = <2>;
      interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
                   <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
      clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
      clock-names = "pclk";
    };

...
