# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/qcom,gcc-monaco.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. Global Clock & Reset Controller

maintainers:
  - Taniya Das <quic_tdas@quicinc.com>

description: |
  Global clock control module which supports the clocks, resets and
  power domains on Monaco.

  See also:
  - dt-bindings/clock/qcom,gcc-monaco.h

properties:
  compatible:
    const: qcom,monaco-gcc

  clocks:
    items:
      - description: Board XO source
      - description: Board XO_AO source
      - description: Sleep clock source
    minItems: 2

  clock-names:
    items:
      - const: bi_tcxo
      - const: bi_tcxo_ao
      - const: sleep_clk
    minItems: 2

  vdd_cx-supply:
    description: Phandle pointer to the vdd_cx logic rail supply

  vdd_mxa-supply:
    description: Phandle pointer to the vdd_mxa logic rail supply

required:
  - compatible
  - clocks
  - clock-names

allOf:
  - $ref: "qcom,gcc.yaml#"

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/qcom,rpmcc.h>
       gcc: clock-controller@1410000 {
                compatible = "qcom,monaco-gcc", "syscon";
                reg = <0x1400000 0x1e0000>;
                reg-names = "cc_base";
                vdd_cx-supply = <&VDD_CX_LEVEL>;
                vdd_mx-supply = <&VDD_MXA_LEVEL>;
                clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
                         <&rpmcc RPM_SMD_XO_A_CLK_SRC>,
                         <&sleep_clk>;
                clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk";
                #clock-cells = <1>;
                #reset-cells = <1>;
       };
...
