# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qti-lmh-dcvs.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Technologies, Inc. Limits Management Hardware DCVS Cooling Device

maintainers:
  - Rashid Zafar <quic_rzafar@quicinc.com>

description: |
  The LMH-DCVS block is a hardware IP for every CPU cluster, to handle quick
  changes in thermal limits. The hardware responds to thermal variation amongst
  the CPUs in the cluster by requesting limits on the clock frequency and
  voltage on the OSM hardware.

  The LMH DCVS driver exports a virtual sensor that can be used to set the
  thermal limits on the hardware. LMH DCVS driver can be a platform CPU Cooling
  device, which registers with the CPU cooling device interface. All CPU device
  nodes should reference the corresponding LMH DCVS hardware in device tree.
  CPUs referencing the same LMH DCVS node will be associated with the
  corresponding cooling device as related CPUs.

properties:
  compatible:
    const: qcom,msm-hw-limits

  reg:
    maxItems: 2
    description: |
      <a, b> where 'a' is the starting register address of the OSM/LLM
      and 'b' is the size of OSM/LLM address space. The
      register space in index 0 should be LLM and index 1
      should be OSM.

  interrupts:
    maxItems: 1
    description: |
      Should specify interrupt information about the debug
      interrupt generated by the LMH DCVSh hardware. LMH
      DCVSh hardware will generate this interrupt whenever
      it makes a new CPU DCVS decision.

  qcom,affinity:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: |
      Should specify the cluster affinity this hardware corresponds to.

  isens_vref_0p8-supply:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: |
      Should specify the phandle of the vref regulator used by
      the isens hardware. This active only regulator will be
      enabled by LMH DCVSh. Isens hardware needs 1.8v and
      0.8v supply regulators.

  isens_vref_1p8-supply:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: |
      Should specify the phandle of the vref regulator used by
      the isens hardware. This active only regulator will be
      enabled by LMH DCVSh. Isens hardware needs 1.8v and
      0.8v supply regulators.

  isens-vref-0p8-settings:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    description: |
      Should specify the min voltage(uV), max voltage(uV) and
      max load(uA) for the isens vref regulator. This
      property is valid only if there is valid entry for
      isens_vref_0p8-supply.

  isens-vref-1p8-settings:
    $ref: /schemas/types.yaml#/definitions/uint32-array
    description: |
      Should specify the min voltage(uV), max voltage(uV) and
      max load(uA) for the isens vref regulator. This
      property is valid only if there is valid entry for
      isens_vref_1p8-supply.

  qcom,no-cooling-device-register:
    type: boolean
    description: |
      Should define this property if this driver doesn't need
      to register CPU cooling devices with thermal framework.

required:
  - compatible

additionalProperties: false

examples:
  - |
        #include <dt-bindings/interrupt-controller/arm-gic.h>
        #include <dt-bindings/regulator/qcom,rpmh-regulator-levels.h>

        qcom,limits-dcvs {
                compatible = "qcom,msm-hw-limits";
                isens_vref_0p8-supply = <&pm_v8_l1_ao>;
                isens-vref-0p8-settings = <880000 880000 30000>;
                isens_vref_1p8-supply = <&pm_v8_l3_ao>;
                isens-vref-1p8-settings = <1200000 1200000 8000>;
        };
