# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/amlogic,meson-nand.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Amlogic NAND Flash Controller (NFC) for GXBB/GXL/AXG family SoCs

allOf:
  - $ref: nand-controller.yaml

maintainers:
  - liang.yang@amlogic.com

properties:
  compatible:
    enum:
      - amlogic,meson-gxl-nfc
      - amlogic,meson-axg-nfc

  reg:
    maxItems: 2

  reg-names:
    items:
      - const: nfc
      - const: emmc

  interrupts:
    maxItems: 1

  clocks:
    minItems: 2

  clock-names:
    items:
      - const: core
      - const: device

patternProperties:
  "^nand@[0-7]$":
    type: object
    properties:
      reg:
        minimum: 0
        maximum: 1

      nand-ecc-mode:
        const: hw

      nand-ecc-step-size:
        const: 1024

      nand-ecc-strength:
        enum: [8, 16, 24, 30, 40, 50, 60]
        description: |
          The ECC configurations that can be supported are as follows.
            meson-gxl-nfc 8, 16, 24, 30, 40, 50, 60
            meson-axg-nfc 8

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names

unevaluatedProperties: false

examples:
  - |
    #include <dt-bindings/clock/axg-clkc.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    nand-controller@ffe07800 {
      compatible = "amlogic,meson-axg-nfc";
      reg = <0xffe07800 0x100>, <0xffe07000 0x800>;
      reg-names = "nfc", "emmc";
      interrupts = <GIC_SPI 34 IRQ_TYPE_EDGE_RISING>;
      clocks = <&clkc CLKID_SD_EMMC_C>,  <&clkc CLKID_FCLK_DIV2>;
      clock-names = "core", "device";

      pinctrl-0 = <&nand_pins>;
      pinctrl-names = "default";

      #address-cells = <1>;
      #size-cells = <0>;

      nand@0 {
        reg = <0>;
      };
    };

...
