# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/dsp/mediatek,mt8195-dsp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Mediatek mt8195 DSP core

maintainers:
  - YC Hung <yc.hung@mediatek.com>

description: |
  Some boards from mt8195 contain a DSP core used for
  advanced pre- and post- audio processing.

properties:
  compatible:
    const: mediatek,mt8195-dsp

  reg:
    items:
      - description: Address and size of the DSP Cfg registers
      - description: Address and size of the DSP SRAM

  reg-names:
    items:
      - const: cfg
      - const: sram

  clocks:
    items:
      - description: mux for audio dsp clock
      - description: 26M clock
      - description: mux for audio dsp local bus
      - description: default audio dsp local bus clock source
      - description: clock gate for audio dsp clock
      - description: mux for audio dsp access external bus

  clock-names:
    items:
      - const: adsp_sel
      - const: clk26m_ck
      - const: audio_local_bus
      - const: mainpll_d7_d2
      - const: scp_adsp_audiodsp
      - const: audio_h

  power-domains:
    maxItems: 1

  mboxes:
    items:
      - description: mailbox for receiving audio DSP requests.
      - description: mailbox for transmitting requests to audio DSP.

  mbox-names:
    items:
      - const: rx
      - const: tx

  memory-region:
    items:
      - description: dma buffer between host and DSP.
      - description: DSP system memory.

required:
  - compatible
  - reg
  - reg-names
  - clocks
  - clock-names
  - memory-region
  - power-domains
  - mbox-names
  - mboxes

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    #include <dt-bindings/interrupt-controller/irq.h>
    dsp@10803000 {
       compatible =  "mediatek,mt8195-dsp";
       reg = <0x10803000  0x1000>,
             <0x10840000  0x40000>;
       reg-names = "cfg", "sram";
       clocks = <&topckgen 10>, //CLK_TOP_ADSP
                <&clk26m>,
                <&topckgen 107>, //CLK_TOP_AUDIO_LOCAL_BUS
                <&topckgen 136>, //CLK_TOP_MAINPLL_D7_D2
                <&scp_adsp 0>, //CLK_SCP_ADSP_AUDIODSP
                <&topckgen 34>; //CLK_TOP_AUDIO_H
       clock-names = "adsp_sel",
                     "clk26m_ck",
                     "audio_local_bus",
                     "mainpll_d7_d2",
                     "scp_adsp_audiodsp",
                     "audio_h";
       memory-region = <&adsp_dma_mem_reserved>,
                       <&adsp_mem_reserved>;
       power-domains = <&spm 6>; //MT8195_POWER_DOMAIN_ADSP
       mbox-names = "rx", "tx";
       mboxes = <&adsp_mailbox0>, <&adsp_mailbox1>;
    };
