196 lines
7.0 KiB
Plaintext
196 lines
7.0 KiB
Plaintext
###############################################################################
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# Extended CofigID
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#WTX_COUNT_CONFIG E403
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#DPD_ENTRY_TIMEOUT E404
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#ANTENNA_RX_IDX_DEFINE E460
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#ANTENNA_RX_PAIR_DEFINE E462
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#ANTENNA_TX_IDX_DEFINE E463
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#ANTENNAS_CONFIGURATION_RX E465
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#CCC_DEBUG_INFO_CFG E466
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##Note: CCC_DEBUG_INFO_CFG disabled by default, if required add the
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## config (E4, 66, 04, 00, 00, 00, 00) and update the
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## number of parameter accordingly in the header part.
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#CLK_CONFIG_CTRL E43A
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#DDFS_CONFIG_PER_PULSE_SHAPE E43B
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#Note: Config for clock source selection and refer UCI specification
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# for more information.
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UWB_CORE_EXT_DEVICE_DEFAULT_CONFIG={06,
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E4, 03, 01, B4,
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E4, 04, 02, C8, 00,
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E4, 60, 0D, 02, 01, 03, 00, 00, 00, 00, 02, 02, 00, 00, 00, 00,
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E4, 63, 07, 01, 01, 02, 00, 00, 00, 00,
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E4, 3A, 05, 00, E8, 03, E8, 03,
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E4, 33, 01, 01
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}
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# Set system time uncertainty value in microsec for CCC ranging
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UWB_INITIATION_TIME_DELTA=200000
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#LIST OF UWB CAPABILITY INFO NOT RECEIVED FROM UWBS
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# mapping device caps according to Fira 2.0
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# TODO: Remove once FW support available
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UWB_VENDOR_CAPABILITY={ A7, 04, 01, 00, 00, 00,
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A8, 04, 08, 00, 00, 00,
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AB, 02, 64, 00,
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E3, 01, 01,
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E4, 04, 64, 00, 00, 00,
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E5, 04, 03, 00, 00, 00,
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E6, 01, 01,
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E7, 01, 01,
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E8, 04, B0, 04, 00, 00,
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E9, 04, 08, 00, 00, 00,
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EA, 02, 09, 00
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}
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# This config enable/disable the Vendor extended notifications
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# 00 for disable
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# 01 for enable
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# NXP_UWB_EXTENDED_NTF_CONFIG={20, 04, 00, 05, 01, E4, 33, 01, 01}
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# This config enable/disable the dpd entry prevention ntf config during init
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# 00 for disable
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# 01 for enable
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UWB_DPD_ENTRY_PREVENTION_NTF_CONFIG=0x01
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COUNTRY_CODE_CAP_FILE_LOCATION={"vendor/etc/", "data/vendor/uwb/scpm/"}
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##Note: Below configs are applicable in User_Mode FW only
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#WIFI_COEX_FEATURE 0xF0
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##Note: WIFI_COEX_FEATURE is disabled by default.
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## Based on requirement add the below configs:
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## Enable CH5 - (F0, 06, 01, 01, 05, 3C, 1E, 1E)
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## Enable CH9 - (F0, 06, 01, 01, 09, 3C, 1E, 1E)
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## Enable both CH5 and CH9 - (F0, 0A, 01, 02, 05, 3C, 1E, 1E, 09, 3C, 1E, 1E)
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##
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## Update the length and number of parameter accordingly in
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## the header part.
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#DPD_WAKEUP_SRC E4 02
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#GPIO_USAGE_CONFIG E4 08
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## Customer need to set the DPD_WAKEUP_SOURCE before applying the GPIO_USAGE_CONFIG command to
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## enable time sync notification feature
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UWB_USER_FW_BOOT_MODE_CONFIG={20, 04, 00, 0D, 02,
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F0, 06, 01, 01, 05, 1E, 32, 0F,
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E4, 02, 01, 00
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}
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###############################################################################
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# Helios FW Name
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# libsr200t_fw.bin to download FW from bin file
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# libsr200t_fw.so to download FW from so file
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NXP_UWB_FW_FILENAME="libsr200t_prod_fw.so"
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###############################################################################
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###############################################################################
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#enable or disable fw download logging
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UWB_FW_DOWNLOAD_LOG=0x00
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###############################################################################
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###############################################################################
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#enable or disable delete ursk for ccc session
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DELETE_URSK_FOR_CCC_SESSION=0x00
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###############################################################################
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###############################################################################
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#enable or disable sts index overriding for ccc session
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OVERRIDE_STS_INDEX_FOR_CCC_SESSION=0x01
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###############################################################################
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###############################################################################
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# FW FLASH update Options Configurations
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# FLASH_UPPER_VERSION 0x01
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# FLASH_ALWAYS 0x02
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## Lower Major Version is Not Possible
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# FLASH_DIFFERENT_VERSION 0x03
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## Same Version is Not Possible
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NXP_UWB_FLASH_CONFIG=0x03
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###############################################################################
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###############################################################################
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# Platform ID Max size can be upto 16 Bytes
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PLATFORM_ID="SAMSUNG-SECCALIB"
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###############################################################################
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###############################################################################
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# set Crystal calibration seetings
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# byte[8-9] 38.4 MHz XTAL CAP1
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# byte[10-11] 38.4 MHz XTAL CAP2
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# byte[12-13] 38.4 MHz XTAL GM
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NXP_UWB_XTAL_38MHZ_CONFIG={2F, 21, 00, 0A, 05, 01, 07, 03, 24, 00, 24, 00, 04, 00}
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###############################################################################
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# Core Device configurations
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# Below sections needs to be updated with the correct values for needed core device configurations
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NXP_CORE_CONF_BLK_1={2F, 21, 00, 0A, 05, 02, 07, 02, 01, 50, 48, 02, 50, 48}
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NXP_CORE_CONF_BLK_2={2F, 21, 00, 0A, 09, 02, 07, 02, 01, 1C, 48, 02, 1C, 48}
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#NXP_CORE_CONF_BLK_3={}
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#NXP_CORE_CONF_BLK_4={}
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#NXP_CORE_CONF_BLK_5={}
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#NXP_CORE_CONF_BLK_6={}
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NXP_CORE_CONF_BLK_7={2F, 21, 00, 0D, 05, 67, 0A, 01, 01, 00, 00, 2D, 00, 41, 06, 7F, 0C}
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NXP_CORE_CONF_BLK_8={2F, 21, 00, 0D, 09, 67, 0A, 01, 01, 00, 00, 2D, 00, 41, 06, 7F, 0E}
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#NXP_CORE_CONF_BLK_9={}
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#NXP_CORE_CONF_BLK_10={}
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###############################################################################
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# Below sections needs to be updated with the correct values for needed Secure device configurations
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# XTAL_38MHZ_CONFIG for SECURE CAL
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NXP_SECURE_CONFIG_BLK_1={2F, 23, 00, 1D, 05, 02, 03, 24, 00, 24, 00, 04, 00, 00, 00, 00, 00, 90, 79, DB, 1B, 6F, AD, 1C, 8A, 70, 5F, E3, E9, C5, CC, 39, 87}
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# RX_DELAY_CAL_CH5 for SECURE CAL
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NXP_SECURE_CONFIG_BLK_2={2F, 23, 00, 1D, 05, 0F, 02, 01, 50, 48, 02, 50, 48, 00, 00, 00, 00, 3A, 2F, E9, 19, 3D, D9, 28, 7B, F9, 08, F2, 8B, 5D, 94, 2A, 95}
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# RX_DELAY_CAL_CH9 for SECURE CAL
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NXP_SECURE_CONFIG_BLK_3={2F, 23, 00, 1D, 09, 0F, 02, 01, 1C, 48, 02, 1C, 48, 00, 00, 00, 00, 5F, 6C, CD, B2, BE, 74, A9, C6, 0E, F9, 01, 03, A9, 3F, C6, 04}
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#NXP_SECURE_CONFIG_BLK_4={}
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#NXP_SECURE_CONFIG_BLK_5={}
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#NXP_SECURE_CONFIG_BLK_6={}
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#NXP_SECURE_CONFIG_BLK_7={}
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#NXP_SECURE_CONFIG_BLK_8={}
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#NXP_SECURE_CONFIG_BLK_9={}
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#NXP_SECURE_CONFIG_BLK_10={}
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###############################################################################
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#set log levels for each modules.
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#ANDROID_LOG_ERROR 0x01
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#ANDROID_LOG_WARN 0x02
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#ANDROID_LOG_INFO 0x03
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#ANDROID_LOG_DEBUG 0x04
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###############################################################################
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NXP_LOG_JNI_LOGLEVEL=0x01
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NXP_LOG_UCI_CORE_LOGLEVEL=0x01
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NXP_LOG_UCIHAL_LOGLEVEL=0x01
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NXP_LOG_FWDNLD_LOGLEVEL=0x01
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NXP_LOG_TML_LOGLEVEL=0x01
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NXP_LOG_UCIX_LOGLEVEL=0x04
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NXP_LOG_UCIR_LOGLEVEL=0x04
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NXP_LOG_EXTNS_LOGLEVEL=0x01
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###############################################################################
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#enable or disable uwb uci debug logging to file
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#0x00 - Disables writing log to file
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#0x01 - Enable log
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UWB_UCIX_UCIR_ERROR_LOG=0x01
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###############################################################################
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#Size of uwb uci debug log file
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#Max value is 1MB
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#Less than 100kb restricted data printed in file
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#Define values in bytes 50kb - 50000
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UWB_DEBUG_LOG_FILE_SIZE=1000000 |